Memory resources have innumerable applications in electronic devices and other computing environments. Continued drive to smaller and more energy efficient devices has resulted in scaling issues with traditional memory resources that are based on using electron charges for data storage and access. Phase change materials (PM) are based on the property of certain compounds to take on one of two or more states based on heat applied to the material. PMs have been made of chalcogenide materials, which exhibit at least two states: a structured crystalline state and a non-ordered amorphous state, depending on characteristics of the application of heat to the material. PMs offer potential advantages for use in memory in that they are nonvolatile, and can potentially scale smaller due to the storage and access of data being based on the structure of the material state instead of on electron charge.
However, access performance in memories based on PMs has historically been significantly worse than that of established memory technologies. Recently, read latency has improved to be comparable to other memory technologies, but write latency continues to result in significant delays. Write latency in phase change memories (PCM) is primarily limited by the set pulse to crystallize or set the PM from its reset or amorphous state. Traditional set algorithms use a fixed ramp rate for either a ramp down approach (first heat the material to the amorphous state, and control the cooling to attempt to change to the crystalline state), or a ramp up approach (controlled increase in temperature to attempt to promote crystallization). These approaches or set procedures attempt to ensure that all memory cells experience an optimal set temperature to minimize the set latency/duration.
Both ramp up and ramp down approaches perform reasonably well in cells with unconfined PM, but are not effective in cells having fully amorphized PM. An unconfined PM refers to a PM that is not fully amorphized in the reset state, and thus always includes crystal nuclei or crystalline region. Thus, the set process is dominated only by crystal growth to transform the amorphous region(s) to the crystalline state based on the nuclei already present. However, to scale PM-based memories to smaller size, cost, and power consumption, the cell size must be decreased. Seeing that the extent to which the cell becomes fully amorphized correlates with PM thickness and/or area of the cell, scaling PM-based memories to smaller geometries results in memory cells that will not set efficiently by traditional set procedures. Thus, traditional set procedures require confined cells to grow crystal, and scaling to smaller geometries reduces the number of nuclei or the amount of crystalline area, which increases set times. The PM will not properly transition to the crystalline state when there are insufficient nuclei or a sufficient crystalline region to promote crystal growth. Thus, traditional set procedures result in very long set procedures, negatively impacting write latency, and/or result in cells that are not set effectively, resulting in higher bit error rate (BER).
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein.